Automation and Make
- Make allows us to specify what depends on what and how to update
things that are out of date.
# for comments in Makefiles.
- Write rules as
- Specify update actions in a tab-indented block under the rule.
.PHONY to mark targets that don’t correspond to
$@ to refer to the target of the current rule.
$^ to refer to the dependencies of the current
$< to refer to the first dependency of the
- Make results depend on processing scripts as well as data
- Dependencies are transitive: if A depends on B and B depends on C, a
change to C will indirectly trigger an update to A.
- Use the wildcard
% as a placeholder in targets and
- Use the special variable
$* to refer to matching sets
of files in actions.
- Define variables by assigning values to names.
- Reference variables using
- Make is actually a small programming language with many built-in
wildcard function to get lists of files matching a
patsubst function to rewrite file names.
- Document Makefiles by adding specially-formatted comments and a
target to extract and format them.
- Makefiles save time by automating repetitive work, and save thinking
by documenting how to reproduce results.